1. Field of the Invention
The present invention relates to a decimation filter, specifically, to a decimation filter in which a 2-stage finite impulse response (FIR) filter used to convert a 4:2:2 formatted video signal into a 4:2:0 formatted video signal using a configuration of adders without using of a multiplier.
2. Discussion of Related Art
The format of digital motion pictures for HDTV has been established by the Society of Motion Picture and Television Engineers (SMPTE) standard 260M. "Luminance" expresses the degree of brightness of a picture, and the luminance of one picture element is represented by eight bits. "Chrominance" is information expressing the color of a picture, and it represents the color of a picture element using two eight-bit variables. The sampling frequency ratio indicates the ratio of three components, luminance information Y and chrominance information Cb and Cr, which are included in a scanning line of TV picture to one another. For example, 4:2:0, 4:2:2 and 4:4:4 indicate the sampling frequency ratios of a luminance signal Y and two chrominance signals Cb and Cr. In case of 4:2:0, 4:2:0 and 4:0:2 are alternately shown on odd and even scanning lines, thus one of ratios, 4:2:0 for example, is representative of the ratio.
Though 24-bit information is, conventionally, assigned to one picture element, chrominance information can be reduced because human eyes are not sensitive to colors. 4:4:4 indicates that the chrominance information is not reduced, 4:2:2 indicates that the information is reduced in the horizontal direction, and 4:2:0 indicates that the information is reduced in the horizontal and vertical directions. In 4:2:0 format, chrominance information Cb and Cr are sampled at half the frequency of luminance information Y in the horizontal and vertical directions. That is, two lines are alternately repeated, one of those having Y sampled at 13.5 MHz, Cb sampled at 6.75 MHz and Cr not being sampled, the other one having Y sampled at 13.5 MHz, Cb not being samples and Cr sampled at 6.75 MHz. When Y is regarded as 4, it becomes the repetition of 4:2:0 and 4:0:2.
FIG. 1 shows a conventional interface device for compressing a 4:2:2 signal into 4:2:0 signal. Referring to FIG. 1, a signal SMPTE260M from a camera 1 is converted by an analog/digital converter 2 into a 4:2:2 digital video signal, having luminance signal Y and chrominance signals Cb and Cr. Luminance signal Y is converted into 8-bit digital signal, and sent to a ECL/TTL converter 3. Chrominance signals Cb and Cr are alternately converted into 8-bit digital signals, and sent to ECL/TTL converter 3. ECL/TTL converter 3 changes the level of the digital signal from an emitter coupled logic level to transistor logic level, and generates a control signal. 4:2:2 video signal produced by ECL/TTL converter 3 is sent to a video signal format converter 4, which converts the signal into a 4:2:0 video signal, and then sends the signal to a digital signal processor 5. The control signal generated by ECL/TTL converter 3 is sent to digital signal processor 5 by way of the video signal format converter.
The above-described conversion process, converting the 4:2:2 formatted video signal into the 4:2:0 formatted video signal, is called decimation. A typical decimation filter is disclosed in U.S Pat. No. 5,170,368, which was designed to able to change the decimation ratio.
A FIR filter is used to reduce aliasing effect generated during down-sampling of a video signal in the decimation process. This FIR filter is often used when the decimation of the chrominance signal is accomplished using hardware. FIG. 2 shows a conventional FIR filter. Referring to FIG. 2, the FIR filter includes: a first multiplier 21, for multiplying the input signal x(n) by a first predetermined multiplication factor (0.75); a delay 22, for delaying the input signal x(n) for a predetermined time; a second multiplier 23, for multiplying the signal x(n-1) output from delay 22 by a second predetermined multiplication factor (0.25); and an adder 24, for adding the signals from first and second multipliers 21 and 23.
First multiplier 21 of the 2-stage FIR filter multiplies 4:2:2 formatted video signal x(n), shown in FIG. 3A, by the factor of 0.75. Delay 22 delays signal x(n) output from the first multiplier for a predetermined time in the vertical direction, and outputs the delayed 4:2:2 formatted chrominance signal x(n-1) to second multiplier 23. Second multiplier 23 multiplies the delayed chrominance signal x(n-1) by the factor of 0.25 in the vertical direction. Adder 24 adds the signals from first and second multipliers 21 and 23, and outputs a 4:2:0 formatted signal y(n) as shown in FIG. 3B. This can be represented as a formula, y(n)=0.75x(n)+0.25x(n-1), where y(n) is a 4:2:0 formatted signal, x(n) is a 4:2:2 formatted signal, and x(n-1) is a 4:2:2 format signal delayed in the vertical direction.
However, since the aforementioned conventional 2-stage FIR filter employs two multipliers, its configuration is complicated, and the calculations take a long time.